About

I’m Ivan Sarno, a Ph.D. candidate at the University of Grenoble Alpes, conducting research at CEA List and TIMA Laboratory in Grenoble, France. My research focuses on the secure hardware/software implementation of post-quantum cryptography on RISC-V platforms, combining interests in cryptography, computer architecture, hardware design, and embedded security.

Experience

PhD Researcher — CEA List / University of Grenoble Alpes (Sep 2024 – present)

PhD on Secure Hardware/Software Implementation of Post-Quantum Cryptography on RISC-V Platforms, carried out at CEA List and TIMA laboratories. Published KEM22 on IEEE Internet of Things Journal — a hardware accelerator for ML-KEM on ASIC.

Graduate Researcher — University of Pisa, Electronic Systems Lab (Sep 2023 – Sep 2024)

Developed IPs for True Random Number Generation and Post-Quantum Cryptography acceleration for the RISC-V platform within the European Processor Initiative (EPI SG2). Published CRYPHTOR on IEEE Access — a hardware accelerator for Kyber and Dilithium on RISC-V. Co-authored an All-Digital TRNG paper, also on IEEE Access.

Software Engineer — Chainmasons (2017 – 2020)

Designed and developed a confidential transaction system for a privacy-focused cryptocurrency, featuring an ASIC-resistant mining algorithm and a zero-knowledge transaction protocol with no trusted setup. Worked as the bridge between the research team and implementation, providing feedback on protocol design.

Education

PhD in Computer Science — University of Grenoble Alpes (ongoing)

Thesis: Secure Hardware/Software Implementation of Post-Quantum Cryptography on RISC-V Platforms

M.Sc. in Cybersecurity — University of Pisa

Coursework spanning software, hardware, networking, penetration testing, and supply chain security. Thesis: FPGA accelerator for polynomial operations targeting Kyber and Dilithium (SystemVerilog / Vivado), with a RISC-V port of the reference implementations.

B.Sc. in Computer Science — University of Pisa

Focus on theoretical computer science, mathematics, and cryptography. Thesis: analysis of the Algorand blockchain consensus protocol.

Skills

Languages: Italian (native), English (C1), French (B1)

Programming: C/C++, Java, Python · C#, F#, Rust, OCaml · Go, TypeScript, RISC-V Assembly

Hardware design: Verilog/SystemVerilog · FPGA implementation · ASIC design flow

Crypto/Security: Applied Cryptography · Cryptographic HW/SW Implementation · Post-Quantum Cryptography · Secure Coding · Blockchain

Tools: Vivado · Questasim · Design Compiler · JetBrains IDEs · Xcode